Tag Archives: IEEE

New Publication – JSSC

Posted on October 31, 2024 by admin

Low jitter frequency synthesizers are required to achieve high data-rates in modern wireless and wireline transceivers. When battery powered devices utilize these synthesizers their power consumption must be limited, leading to complex design challenges. In our latest article we unveil … Continue reading →

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New Publication – JSSC

Posted on October 24, 2024 by admin

We are thrilled to share our latest work on TI ADCs. This design demonstrates that high-speed TI ADC design requires focus on auxiliary circuits and the sub-ADC to reduce the degradation of single-channel performance in interleaved mode. Our paper proposes … Continue reading →

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New Publication – JSSC

Posted on October 15, 2024 by admin

We are excited to share a deep dive into our latest work on a 10-GHz chirp generator for FMCW radars, based on a digital PLL (DPLL) featuring two-point injection of the modulation signal. In this work, we introduce a novel … Continue reading →

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New Publications – CICC24

Posted on May 13, 2024 by admin

We’re delighted to announce our involvement in the recent CICC event held in Denver. Our research team showcased two significant contributions: Pietro Salvi presented the work “A 66.7fs-Integrated-Jitter Fractional-N Digital PLL Based on a Resistive-Inverse-Constant-Slope DTC” Michele Rossoni introduced “A … Continue reading →

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New Award – ISSCC 2023

Posted on February 21, 2024 by admin

ARPLab has just received the ISSCC 2023 Jan Van Vessem Award for Oustanding European Paper for the paper “A 76.7fs-Integrated-Jitter and -71.9dBc In-Band Fractional-Spur Bang-Bang Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering.” The paper introduced a … Continue reading →

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New Publications – ISSCC24

Posted on January 30, 2024 by admin

In the upcoming 71st IEEE International Solid-State Circuits Conference (ISSCC) scheduled for February, our laboratory is pleased to announce its participation with three contributions: In Session number 10 (Frequency Synthesis): Michele Rossoni will be presenting the paper “An 8.75GHz Fractional-N … Continue reading →

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New Publication – ICECS23 & TCAS II

Posted on December 5, 2023 by admin

We are proud to announce that our PhD candidate Gabriele Zanoletti has presented our last work: “A 250-MS/s 9.9-ENOB 80.7dB-SFDR Top-Plate Input SAR ADC with Charge Linearization” at the 2023 International Conference on Electronics, Circuits and Systems (ICECS), Istanbul, Turkey. The … Continue reading →

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New Publication – NEWCAS23

Posted on June 28, 2023 by admin

Improving the key parameters of each analog block is mandatory to push the performance of a data converter to the technology limit.  Lorenzo Scaletti has presented our last work “A Novel Push-Pull Input Buffer for Wideband ADCs with improved High-Frequency … Continue reading →

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New Publications – ISSCC23

Posted on January 19, 2023 by admin

One month to the 70th IEEE International Solid-State Circuits Conference (ISSCC) that will be held in San Francisco, CA and we can’t wait to be there! This year two papers from our laboratory were be accepted for presentation: Simone Dartizio will be presenting the … Continue reading →

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New Publication – TCAS-II

Posted on June 20, 2022 by admin

Gabriele Be’ will be presenting the paper “A 900-MS/S SAR-Based Time-Interleaved ADC with a Fully Programmable Interleaving Factor and On-Chip Scalable Background Calibrations”, at the IEEE MWSCAS 2022. The extended version of this paper was also published in the journal Transactions on Circuits and Systems II . This work was possible thanks to the collaboration of … Continue reading →

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