Tag Archives: VLSI

We are proud to announce that our phd candidate Luca Ricci has presented our last work: “A 2GS/s 11b 8x Interleaved ADC with 9.2 ENOB and 69.9dB SFDR in 28nm CMOS” at the 2023 Symposium on VLSI Technology and Circuits, Kyoto, Japan. … Continue reading →