New Publication – ISSCC22

Simone Dartizio will be presenting the paper “A 68.6-fs-rms-Total-Integrated-Jitter and 1.56-us-Locking-Time Fractional-N Bang-Bang PLL Based on a Type-II Gear Shifting and Adaptive Frequency Switching” at the next IEEE International Solid-State Circuits Conference (ISSCC). This work was possible thanks to the collaboration of Politecnico di Milano with Infineon Technologies, Villach and University of Padova. [URL]