{"id":662,"date":"2025-11-10T12:22:06","date_gmt":"2025-11-10T12:22:06","guid":{"rendered":"https:\/\/arplab.deib.polimi.it\/?p=662"},"modified":"2025-11-10T12:22:25","modified_gmt":"2025-11-10T12:22:25","slug":"new-publication-jssc-6","status":"publish","type":"post","link":"https:\/\/arplab.deib.polimi.it\/?p=662","title":{"rendered":"New Publication \u2013 JSSC"},"content":{"rendered":"\n

We are excited to share that our paper is now accessible in early access in the IEEE Journal of Solid-State Circuits (JSSC)!<\/p>\n\n\n\n

The article, titled \u201cA Low-Noise Digital PLL with an Adaptive Common-Mode Resonance Tuning Technique for Voltage-Biased Oscillators\u201d<\/em>, presents an in-depth analysis and extended results of the work we previously presented at the 2025 IEEE International Solid-State Circuits Conference (ISSCC).<\/p>\n\n\n\n

This work introduces a new background calibration technique for voltage-biased oscillators, capable of optimizing their phase-noise performance across the entire tuning range by adaptively adjusting the ratio between common-mode and differential-mode capacitance.<\/p>\n\n\n\n

The test chip, fabricated in a 28-nm CMOS process, achieves 45.8-fs integrated jitter and \u2212146.6-dBc\/Hz phase noise at 10-MHz offset from a 4.75-GHz carrier.<\/p>\n\n\n\n

If you are interested in digital PLLs\u00a0and digitally controlled oscillator design, you can find the article here: [URL]<\/a><\/p>\n\n\n\n

\"\"<\/figure>\n","protected":false},"excerpt":{"rendered":"

We are excited to share that our paper is now accessible in early access in the IEEE Journal of Solid-State Circuits (JSSC)! The article, titled \u201cA Low-Noise Digital PLL with an Adaptive Common-Mode Resonance Tuning Technique for Voltage-Biased Oscillators\u201d, presents an … Continue reading →<\/span><\/a><\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"closed","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[],"tags":[9,10,5],"class_list":["post-662","post","type-post","status-publish","format-standard","hentry","tag-ieee","tag-paper","tag-polimi"],"_links":{"self":[{"href":"https:\/\/arplab.deib.polimi.it\/index.php?rest_route=\/wp\/v2\/posts\/662","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/arplab.deib.polimi.it\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/arplab.deib.polimi.it\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/arplab.deib.polimi.it\/index.php?rest_route=\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/arplab.deib.polimi.it\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=662"}],"version-history":[{"count":1,"href":"https:\/\/arplab.deib.polimi.it\/index.php?rest_route=\/wp\/v2\/posts\/662\/revisions"}],"predecessor-version":[{"id":664,"href":"https:\/\/arplab.deib.polimi.it\/index.php?rest_route=\/wp\/v2\/posts\/662\/revisions\/664"}],"wp:attachment":[{"href":"https:\/\/arplab.deib.polimi.it\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=662"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/arplab.deib.polimi.it\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=662"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/arplab.deib.polimi.it\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=662"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}